Codebreakerhack🙊

"NOP": empty instruction. "RET": end, return. "BLR": Allocate memory. "MOV": register transfer. Format: "MOV X1 X2": The value of X2 is transferred to X1. Transmission logic: Pseudo-c is from right to left, assembly is the same as pseudo-c, and overlay transmission is not sequential addition. "Zero": the register is divided into W and X, the abbreviation of Zero is ZR, so WZR and XZR=0. "LDR": Data is loaded from memory into a register. Format 1: "LDR X8, [X8,#0xBA0]" Format 2: "LDR X8, [X0]" Format 3: "LDR X5, [PC,#-0x3C]" Format 4: "LDR W3, [SP,#-0x3C] Format 1: Load the contents of the memory address X8 register + 0xBA0 into the X8 register. Format 2: Load the contents of the memory address X0 register into the X8 register. Format 3: Load the memory address into the X5 register with the value of its own jump -0x3C. Format 4: Extract the memory address and jump to the value of -0x3C and load it into the W3 register. "STR": Data is retrieved from the register and stored in memory. The "STR" instruction is similar to the "LDR" instruction and means "opposite", so you can understand it here. "LDP": Load data from both registers simultaneously. The two registers loaded with data at the same time are protected, and you cannot trigger anything related to this protected register during analysis. Format: "LDP X20, X19, [SP,#0x60]" X20 and X19 data are loaded and thus protected. "STP": Store the data in dual registers into memory at the same time. The two registers storing data at the same time are protected, and you cannot trigger anything related to this protected register during analysis. Format: "STP X20, X19, [SP,#0x60]" X20 and X19 data are stored in memory and thus protected. "SUB": subtraction instruction. "SUB SP, SP, #0x30": Subtract 30 from the second SP and load the result into the first SP. "ADD": addition instruction. "ADD SP, SP, #0x30": Add 30 to the second SP and load the result into the first SP. }}]