Experimental chill
Algorithms, libraries, C++, Linux, Distributed Systems, maybe Rust Donate: https://t.me/experimentalchill/222 Author: @Danlark Nothing in this blog is an opinion of my employer
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cache management algorithm
TLDR: we’re looking for a well-defined way to create objects with vptrs via memcpy. We have a common code pattern on creating new message objects in protobuf parser: // Message is almost trivial, except that it has virtual methods class Message { public: virtual ~Message(); // allocate memory from the arena, and call placement new. virtual Message* New(Arena* arena); intptr_t meta_data_; }; Message* create(const Message* default_instance, Arena* arena) { return defaul...
We applied insights from this work to Temeraire, in order to make better decisions about when to break up huge pages in this allocator, which led to an estimated 1% throughput improvement across Google’s fleetВ общем, в этом достаточно интересный урок -- не бойтесь делать анализы скоростей света, когда можно потратить больше времени, чтобы найти лучше конфигурацию. Такие эксперименты дают больше понимания, что в идеальной ситуации должно работать.
snappy 1.2.0 lvl1 636 MB/s 3173 MB/s 101436030 47.86 silesia.tar
snappy 1.2.0 lvl2 460 MB/s 3330 MB/s 94740855 44.70 silesia.tar
Stella Nera: Achieving 161 TOp/s/W with Multiplier-free DNN Acceleration based on Approximate Matrix Multiplication They built a crazy fast hardware accelerator based on my approximate matrix multiplication paper. By “crazy fast,” I mean they get 15x higher area efficiency and 25x better power efficiency vs conventional matrix multiply acclerators (think GPUs) when holding transistor technology constant. At ~1.5x better power efficiency per hardware generation, this is about 8 generations of gains at once.
Stella Nera: Achieving 161 TOp/s/W with Multiplier-free DNN Acceleration based on Approximate Matrix Multiplication They built a crazy fast hardware accelerator based on my approximate matrix multiplication paper. By “crazy fast,” I mean they get 15x higher area efficiency and 25x better power efficiency vs conventional matrix multiply acclerators (think GPUs) when holding transistor technology constant. At ~1.5x better power efficiency per hardware generation, this is about 8 generations of gains at once.
LLM powered fuzzing via OSS-Fuzz. Contribute to google/oss-fuzz-gen development by creating an account on GitHub.
Important Dates Student Travel Grants: January 24, 2024 Early Registration Deadline: February 2, 2024 Conference Period: March 2 – 6, 2024 Register for the conference The International Symposium on Code Generation and Optimization (CGO) provides a premier venue to bring together researchers and practitioners working at the interface of hardware and software on a wide range of optimization and code generation techniques and related issues. The conference spans the spectrum from purely static to fully dynamic approaches, and from pure ...
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