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Answer: a
Explanation: In this, only a part of the program getting executed is stored on the memory and later swapped in for the other part.
43. The unit which acts as an intermediate agent between memory and backing store to reduce process time is ___
a) TLB’s
b) Registers
c) Page tables
d) Cache
Answer: d
Explanation: The cache’s help in data transfers by storing most recently used memory pages.
44. Does the Load instruction do the following operation/s?
a) Loads the contents of a disc onto a memory location
b) Loads the contents of a location onto the accumulators
c) Load the contents of the PCB onto the register
d) None of the mentioned
Answer: b
Explanation: The load instruction is basically used to load the contents of a memory location onto a register.
45. Complete the following analogy:- Registers are to RAM’s as Cache’s are to ___
a) System stacks
b) Overlays
c) Page Table
d) TLB
Answer: d
46. The BOOT sector files of the system are stored in ___
a) Harddisk
b) ROM
c) RAM
d) Fast solid state chips in the motherboard
Answer: b
Explanation: The files which are required for the starting up of a system are stored on the ROM.
47. The transfer of large chunks of data with the involvement of the processor is done by ___
a) DMA controller
b) Arbitrator
c) User system programs
d) None of the mentioned
Answer: a
Explanation: This mode of transfer involves the transfer of a large block of data from the memory.
48. Which of the following techniques used to effectively utilize main memory?
a) Address binding
b) Dynamic linking
c) Dynamic loading
d) Both Dynamic linking and loading
Answer: c
Explanation: In this method only when the routine is required is loaded and hence saves memory.
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Answer: d
Explanation: The controller gets the request from the device needing the memory read or write operation and then it multiplexes the address.
28. The data is transferred over the RAMBUS as ___
a) Blocks
b) Swing voltages
c) Bits
d) Packets
Answer: b
Explanation: By using voltage swings to transfer data, the transfer rate along with efficiency is improved.
29. The memory devices which are similar to EEPROM but differ in the cost effectiveness is __
a) CMOS
b) Memory sticks
c) Blue-ray devices
d) Flash memory
Answer: d
Explanation: The flash memory functions similar to the EEPROM but is much cheaper.
30. The flash memory modules designed to replace the functioning of a hard disk is __
a) RIMM
b) FIMM
c) Flash drives
d) DIMM
Answer: c
Explanation: The flash drives have been developed to provide faster operation but with lesser space.
31. The drawback of building a large memory with DRAM is ______
a) The Slow speed of operation
b) The large cost factor
c) The inefficient memory organisation
d) All of the mentioned
Answer: a
Explanation: The DRAM’s were used for large memory modules for a long time until a substitute was found.
32. In a 4M-bit chip organisation has a total of 19 external connections, then it has ___ address if 8 data lines are there.
a) 2
b) 5
c) 9
d) 8
Answer: c
Explanation: To have 8 data lines and 19 external connections it has to have 9 address lines(i.e 512 x 8 organisation).
33. What does ISO stands for?
a) International Software Organisation
b) Industrial Software Organisation
c) International Standards Organisation
d) Industrial Standards Organisation
Answer: c
Explanation: The ISO is yet another architectural standard, used to design systems.
34. The bit used to signify that the cache location is updated is ____
a) Flag bit
b) Reference bit
c) Update bit
d) Dirty bit
Answer: d
Explanation: When the cache location is updated in order to signal to the processor this bit is used.
35. During a write operation if the required block is not present in the cache then __ occurs.
a) Write miss
b) Write latency
c) Write hit
d) Write delay
Answer: a
Explanation: This indicates that the operation has missed and it brings the required block into the cache.
36. While using the direct mapping technique, in a 16 bit system the higher order 5 bits are used for ____
a) Id
b) Word
c) Tag
d) Block
Answer: c
Explanation: The tag is used to identify the block mapped onto one particular cache block.
37. The bit used to indicate whether the block was recently used or not is ___
a) Reference bit
b) Dirty bit
c) Control bit
d) Idol bit
Answer: b
Explanation: The dirty bit is used to show that the block was recently modified and for a replacement algorithm.
38. The number successful accesses to memory stated as a fraction is called as _
a) Access rate
b) Success rate
c) Hit rate
d) Miss rate
Answer: c
Explanation: The hit rate is an important factor in performance measurement.
39. Add #%01011101,R1 , when this instruction is executed then _____
a) The binary addition between the operands takes place
b) The Numerical value represented by the binary value is added to the value of R1
c) The addition doesn’t take place, whereas this is similar to a MOV instruction
d) None of the mentioned
Answer: a
Explanation: This performs operations in binary mode directly.
40. If we want to perform memory or arithmetic operations on data in Hexa-decimal mode then we use _____ symbol before the operand.
a) ~
b) !
c) $
d) *
Answer: c
41. When generating physical addresses from a logical address the offset is stored in __
a) Translation look-aside buffer
b) Relocation register
c) Page table
d) Shift register
Answer: b
Explanation: In the MMU the relocation register stores the offset address.
42. The technique used to store programs larger than the memory is ____
a) Overlays
b) Extension registers
c) Buffers
d) Both Extension registers and Buffers
13. The VLIW architecture follows _ approach to achieve parallelism.
a) SISD
b) MIMD
c) MISD
d) SIMD
Answer: b
Explanation: The MIMD stands for Multiple Instructions Multiple Data.
14. What does VLIW stands for?
a) Very Long Instruction Width
b) Very Large Instruction Word
c) Very Long Instruction Width
d) Very Long Instruction Word
View Answer
Answer: d
Explanation: It is the architecture designed to perform multiple operations in parallel.
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15. In CISC architecture most of the complex instructions are stored in _
a) CMOS
b) Register
c) Transistors
d) Diodes
Answer: c
Explanation: In CISC architecture more emphasis is given on the instruction set and the instructions take over a cycle to complete.
16. Both the CISC and RISC architectures have been developed to reduce the __
a) Time delay
b) Semantic gap
c) Cost
d) All of the mentioned
Answer: b
Explanation: The semantic gap is the gap between the high level language and the low level language.
17. ____ are the different type/s of generating control signals.
a) Hardwired
b) Micro-instruction
c) Micro-programmed
d) Both Micro-programmed and Hardwired
Answer: d
Explanation: The above is used to generate control signals in different types of system architectures.
18. If the instruction Add R1, R2, R3 is executed in a system which is pipelined, then the value of S is (Where S is term of the Basic performance equation).
a) 2
b) ~1
c) ~7
d) 2
Answer: b
Explanation: The value will be much lower in case of multiple BUS organisation.
19. The small extremely fast, RAM’s all called as ____
a) Heaps
b) Accumulators
c) Stacks
d) Cache
Answer: a
Explanation: Cache’s are extremely essential in single BUS organisation to achieve fast operation.
20. For a given FINITE number of instructions to be executed, which architecture of the processor provides for a faster execution?
a) ANSA
b) Super-scalar
c) ISA
d) All of the mentioned
Answer: b
Explanation: In super-scalar architecture, the instructions are set in groups and they’re decoded and executed together reducing the amount of time required to process them.
21. What is the full form of ISA?
a) Industry Standard Architecture
b) International Standard Architecture
c) International American Standard
d) None of the mentioned
Answer: c
Explanation: The ISA is an architectural standard developed by IBM for its PC’s.
22. Which of the following is the fullform of CISC?
a) Complex Instruction Sequential Compilation
b) Complete Instruction Sequential Compilation
c) Computer Integrated Sequential Compiler
d) Complex Instruction Set Computer
Answer: d
Explanation: The CISC machines are well adept at handling multiple BUS organisation.
23. The reason for the cells to lose their state over time is ____
a) Use of Shift registers
b) The lower voltage levels
c) Usage of capacitors to store the charge
d) None of the mentioned
Answer: c
Explanation: Since capacitors are used the charge dissipates over time.
24. In order to read multiple bytes of a row at the same time, we make use of __
a) Memory extension
b) Cache
c) Shift register
d) Latch
Answer: d
Explanation: The latch makes it easy to ready multiple bytes of data of the same row simultaneously by just giving the consecutive column address.
25. The difference in the address and data connection between DRAM’s and SDRAM’s is ___
a) The requirement of more address lines in SDRAM’s
b) The usage of a buffer in SDRAM’s
c) The usage of more number of pins in SDRAM’s
d) None of the mentioned
Answer: b
Explanation: The SDRAM uses buffered storage of address and data.
26. The chip can be disabled or cut off from an external connection using __
a) ACPT
b) RESET
c) LOCK
d) Chip select
Answer: d
Explanation: The chip gets enabled if the CS is set otherwise the chip gets disabled.
27. The controller multiplexes the addresses after getting the _ signal.
a) INTR
b) ACK
c) RESET
d) Request
✅Computer Organization & Architecture Course MCQs (Multiple Choice Questions)
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1. What is computer architecture?
a) set of categories and methods that specify the functioning, organisation, and implementation of computer systems
b) set of principles and methods that specify the functioning, organisation, and implementation of computer systems
c) set of functions and methods that specify the functioning, organisation, and implementation of computer systems
d) None of the mentioned
Answer: b
Explanation: A set of principles and methods that specify the functioning, organisation, and implementation of computer systems is known as computer architecture. A system’s architecture refers to its structure in terms of the system’s individually specified components and their interrelationships.
2. What is computer organization?
a) structure and behaviour of a computer system as observed by the user
b) structure of a computer system as observed by the developer
c) structure and behaviour of a computer system as observed by the developer
d) All of the mentioned
Answer: a
Explanation: The structure and behaviour of a computer system as observed by the user is the subject of computer organisation.
3. Which of the following is a type of computer architecture?
a) Microarchitecture
b) Harvard Architecture
c) Von-Neumann Architecture
d) All of the mentioned
Answer: d
Explanation: Below are the types of Computer Architecture:
i) Von-Neumann Architecture
ii) Harvard Architecture
iii) Instruction Set Architecture
iv) Microarchitecture
v) System Design
4. Which of the following is a type of architecture used in the computers nowadays?
a) Microarchitecture
b) Harvard Architecture
c) Von-Neumann Architecture
d) System Design
Answer: c
Explanation: John von Neumann proposed this architecture. The architecture of today’s computers is based on von Neumann architecture. It is based on a few ideas.
5. Which of the following is the subcategories of computer architecture?
a) Microarchitecture
b) Instruction set architecture
c) Systems design
d) All of the mentioned
Answer: a
Explanation: The three main subcategories of computer architecture are:
i) Microarchitecture
ii) Instruction set architecture
iii) Systems design
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6. Which of the architecture is power efficient?
a) RISC
b) ISA
c) IANA
d) CISC
Answer: a
Explanation: Hence the RISC architecture is followed in the design of mobile devices.
7. What does CSA stands for?
a) Computer Service Architecture
b) Computer Speed Addition
c) Carry Save Addition
d) None of the mentioned
Answer: b
Explanation: The CSA is used to speed up the addition of multiplicands.
8. If an exception is raised and the succeeding instructions are executed completely, then the processor is said to have __
a) Generation word
b) Exception handling
c) Imprecise exceptions
d) None of the mentioned
Answer: c
Explanation: The processor since as executed the following instructions even though an exception was raised, hence the exception is treated as imprecise.
9. To reduce the memory access time we generally make use of __
a) SDRAM’s
b) Heaps
c) Cache’s
d) Higher capacity RAM’s
Answer: c
Explanation: The time required to access a part of the memory for data retrieval.
10. The IA-32 system follows which of the following design?
a) CISC
b) SIMD
c) RISC
d) None of the mentioned
Answer: a
Explanation: This system architecture is used to reduce the steps involved in execution by performing complex operations in one step.
11. Which of the following architecture is suitable for a wide range of data types?
a) IA-32
b) ARM
c) ASUS firebird
d) 68000
Answer: a
Explanation: IA-32 architecture is suitable for a wide range of data types.
12. In IA-32 architecture along with the general flags, which of the following conditional flags are provided?
a) TF
b) IOPL
c) IF
d) All of the mentioned
Answer: d
Explanation: These flags are basically used to check the system for exceptions.
5️⃣0️⃣Which of the following are the functions of the xylem?
5️⃣0️⃣6. Which of the following are the functions of the xylem?
4️⃣9️⃣Which of the following organelles is absent in animal cells and present in plant cells?
4️⃣8️⃣Which of the following comprise plant decomposers?
4️⃣7️⃣What is the general trend for atomic radii of alkali metals as we move down the group?
4️⃣6️⃣Which of the following regions of electromagnetic spectrum is called as light?
4️⃣5️⃣The waveform of a certain signal can be studied by
4️⃣3️⃣Which of the following substance’s smell is similar to Ethanoic acid?
4️⃣2️⃣ Which mineral is popularly known as ‘buried sunshine’?
4️⃣1️⃣Dolomite is an ore of which of the following metals?
3️⃣9️⃣Which of the following organs is majorly affected by hepatitis?
